Simulation 3-level-NPC1-inverter - Zth Messtechnik - transient thermal impedance of power semiconductors - thermal-electrical simulation

Your partner for thermal impedance measurement of power semiconductors
Zth-Messtechnik Kiffe
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Simulation 3-level-NPC1-inverter

Example
Increasing power densities in the development of modules and converters lead to ever higher semiconductor temperatures. To ensure reliability of components,
thermal optimization between the semiconductor chip and the heat sink is becoming increasingly important (chip optimization, layout optimization). Through
a simulation, problems can be detected in advance and avoided, as well as development costs can be saved. The thermal-electrical simulation software developed
by Zth-Messtechnik Kiffe for 3-level NPC1 inverters based on "measurements" allows the user to simulate the junction temperature of the individual semiconductor
chips in a power module very accurately in the time domain.
New: The software is now also available as Dynamic Link Library (DLL). By integrating this library into numerical simulation programs, it is possible to simulate
complex converter-fed drives.

The following measurement results are integrated in the 3-level NPC1 inverter simulation software:
  • Forward voltage measurements of all IGBTs and diodes in the phase module at different temperatures (including the voltage drops in the module)
  • Switching measurements of IGBT and diode in the phase module at different load currents and temperatures (Uschalt = Uzk/2)
  • Zth-measurements of all IGBTs and diodes in the phase module, as well as transient thermal coupling measurements between all IGBTs and diodes
 (10 Zth-measurements + 90 coupling measurements)

Example: transient thermal coupling in the phase module (IGBT T1)
The picture shows the cooling curves of the different IGBTs and diodes in the phase module after switching off the load current of T1. The cooling curves
were created from the extracted R/C elements of the measurement curve. The chip layout image shows the spatial position of the various IGBTs and diodes.
Cooling: closed water cooler, heating/cooling time: 100s each.
The semiconductor manufacturer has realized the phase module with the same IGBT chips and diode chips.


3-level-NPC1-inverter-simulation model with 3-phase asynchronous motor:

Abkürzungen:
Uo_above, Uo_below=dc-supply voltage
T1 - T12=IGBT
D1 - D18=Diode
T1 - T4, D1 - D4, D13, D14=module phase U
T5 - T8, D5 - D8, D15, D16=module phase V
T9 - T12, D9 - D12, D17, D18=modul phase W


Structure simulation program:


Rs1, Rs2, Rs3=stator resistance
Ls1, Ls2, Ls3=stator inductance
Lh1, Lh2, Lh3=main inductance
Lr1, Lr2, Lr3=rotor inductance
Rr1, Rr2, Rr3=rotor resistance
Rschl1, Rschl2, Rschl3=slip resistance

Limitations:
Set increment=10ns, Error of approx. 0,3% in the current calculation against a step size of 2ns
Inductance Ls1=Ls2=Ls3, Lh1=Lh2=Lh3, Lr1=Lr2=Lr3
Resistance Rs1=Rs2=Rs3, Rr1=Rr2=Rr3
no dead times during undershoot procedures
Block losses at T1, T2, T3, T4, D1, D2, D3, D4, D13, D14 always 0W
(measurement: T1/D1 (each 2 chips) at 400V/150°C = 0,58W)
no temperature calculation for transistors and diodes in phase V and phase W
temperature for the transistors in phase V and phase W is calculated from mean of T1 to T4
temperature for the freewheeling diodes in phase V and phase W is calculated from mean of D1 to D4
temperature for the clamping diodes in phase V and phase W is calculated from mean of D13 and D14


Simulation results:
Parameter:
3-level-NPC1-IGBT-phasen module 300A/650V
Uo=2x400V
Heatsink: closed water cooler with 14,5mm cover plate
Thermal Compounds: silicone-free
Cooling medium: water 8l/min

Simulation time=0-100s, increment=10ns
Fundamental frequency=400Hz
Modulation frequency=12000Hz
Modulation rate=0,75
Modulations: undershoot method
Starting temperature (Tamb)=25,00°C
Engine data:
Stator inductance Ls1/Ls2/Ls3=0,195mH
Main inductance Lh1/Lh2/Lh3=11,1mH
Rotor inductance Lr1/Lr2/Lr3=0,238mH
Stator resistance Rs1/Rs2/Rs3=15,8m
Rotor resistance Rr1/Rr2/Rr3=10m
Slippage=0,040

The graph shows the simulated junction temperatures of the 10 semiconductors in the time range between 99,995s and 100s (2 periods). You can see here clearly that the internal transistors T2 and T3, as well as the clamping diodes D13 and D14 have a much higher junction temperature than the remaining semiconductors. Looking at the power loss table (right) from the simulation file, you can see the high forward losses of these semiconductors. The reason lies in a long passage phase of these components during an entire half wave. Here the simulation shows that through the use of optimized components reliability can be significantly increased.

Berechnungszeit: letzte Sekunde der Simulation
T1: Pgesamt: 111.537W     Pon/off: 76.525W     Pdurchlass: 35.012W
T2: Pgesamt: 172.371W     Pon/off: 46.652W     Pdurchlass: 125.719W
T3: Pgesamt: 183.409W     Pon/off: 45.514W     Pdurchlass: 137.896W
T4: Pgesamt: 108.297W     Pon/off: 74.443W     Pdurchlass: 33.855W
D1: Pgesamt: 23.688W     Pon/off: 10.425W     Pdurchlass: 13.263W
D2: Pgesamt: 14.825W     Pon/Poff: 0W     Pdurchlass: 14.825W
D3: Pgesamt: 15.706W     Pon/Poff: 0W     Pdurchlass: 15.706W
D4: Pgesamt: 24.945W     Pon/off: 10.884W     Pdurchlass: 14.061W
D13: Pgesamt: 105.286W     Pon/off: 19.990W     Pdurchlass: 85.295W
D14: Pgesamt: 99.216W     Pon/off: 19.619W     Pdurchlass: 79.597W
P(Phase U): 29029.336W (Phasenspannung U * Statorstrom)
Wirkungsgrad: 97.125%

The picture shows the simulated phase currents through the windings, as well as the magnetization currents.

The data from the simulation example can be found in the download area.


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